Luxúrio

... because it's been years since I properly worked on this project, but I want to start working on it again... I'm gonna type out stuff on here. Take all this with a grain of salt, because the vast majority of my thoughts at the time are in a notebook I can't find right now.

Links

Balanced Ternary Logic (Wikipedia)

Tern (Mechanical Advantage) My main source of inspiration and information when I started the project, and where the vast majority of information on this page comes from.

Notation

Balanced Ternary uses three values (much like how binary uses two), but the 'balanced' refers to the fact that the values are [-1, 0, 1]. I notate these as [-, o, +], though there are a few other notation systems: [T, 0, 1], [Z, 0, 1], etc.

A 'trit' is the ternary version of a binary bit, and holds a single digit [-, o, +]. A 'tryte' is the ternary version of a binary byte. Where a byte is generally considered to be 8 bits nowadays, it used to be arbitrary, based on hardware. Similarly, I don't believe a tryte has a defined length. I've considered a few lengths (5 [243 values], 6 [729 values], 9 [19683 values]), but (mainly for arbitrary reasons) I have chosen to use a 6 trit tryte as my standard.

Monadic Gates (single tryte input) will be referred to by T# or T# (where # refers to the gate name), depending on how lazy I am.

Dyadic Gates (two tryte input), because there are so many, will be notated as T### or T###, referring to the three monadic gates which make up the single dyadic gate. However, some of these have been named, so I might use those instead (sorry).

Balanced Ternary Numbers

[maths stuff here, negatives]

Convert to and from Decimal

[python jank here]

Convert to and from Binary

[more snakes here]

Monadic Logic Gates

[oops I gotta CSS this BS]

0 1 2 3 4 5 6 7 8 9 A B C D E F G H K M N P R T V X Z
- - o + - o + - o + - o + - o + - o + - o + - o + - o +
o - - - o o o + + + - - - o o o + + + - - - o o o + + +
+ - - - - - - - - - o o o o o o o o o + + + + + + + + +

Transistor Gates

[all done by Mechanical Advantage]

[link to PDFs]

[Sort gates by shape of the gate. (1trans., 2trans. parallel, 2trans. serial, 3trans. - I think, this is off the top of my head I can't find my old notebook...)]

[my breadboard stuff]

All the monadic gates can be created using between one and three transistors (plus resistors and schottky diodes).

I'm using an ICL7660 to get negative voltage.

Kicad

[general design of monadic gates & general configuration of in/out/power pins]

[sketch of how the design will work]

[maybe I'll actually order them this time instead of procrastinating and forgetting about it for two years...]

Dyadic Gates

[explain how I'm thinking of them, (as a list of three monadic gates) and how they could be constructed?]

Ternary Components

[list of things I'll need for CPU like memory, de/multiplexer (probably), LED indicators, Ternary-Binary Converter, etc.]

Trust me, I have no idea what I'm doing.

Encodings

Signed Integers are easy, unsigned would just require some finangling.

I've got a few ideas for text/character representation in ternary, which I should add here sometime...

Balanced Ternary CPU

Note: I've never properly designed a CPU before, especially not a physical one.

So, what I was thinking was; Program will be stored on an external device. The CPU would request the instruction using the output pins,

I believe a stack-based (with a small stack, 2 trits large so 9 trytes) would work best for me as uxn is the low level programming I'm most used to.

A 1 tryte length instruction (meaning a program could only be 729 instructions long, including data), and I plan to segment out the instruction to something like [XXXYYZ] where XXXYY is the instruction proper (YY being like a pagination to conceptually make it easier for my brain), and Z controls whether the result is pushed to stack, output, or both.

I didn't consider if I could possibly output to a memory location until just now, but that's probably a good idea? Self modifying code FTW.

Instruction Set

Despite having effectively 243 slots for instructions (5 trit + 1 trit), I most likely will not use that many.

Stack stuff [PUSH POP NIP DUPLICATE FLIP ROTATE], Logic stuff [monadic, dyadic*], Conditionals, Jumps, Maths. (memory stuff??). Read/write program counter.

*I could probably design a circuit to build dyadic gates on the fly, maybe..?

PUSH might be the only instruction that requires a second tryte?

Construction?

Way too early to think about this, I've barely remembered how ternary works...

In any case, backplane or connect boards using wires? I'm leaning towards wires

I'd need designs for 1 trit and 1 tryte memory. I'd need probably 12-15 tryte memory boards (stack, program counter, internal registers)

Stack Controller to keep track of stack, to push and pop.

Instruction Decoder. This would depend on how I end up doing the instruction set.

[Other stuff...]